1. Field of the Invention
The present invention relates to a semiconductor device and a memory circuit, and a method for operating the semiconductor device and the memory circuit. Specifically, the present invention relates to a memory circuit which stores a machine language program generated from a high-level language program and a semiconductor device incorporating the memory circuit, and a method for operating the semiconductor device and the memory circuit. Further, the present invention relates to a machine language program generation device which codes the machine language program stored in the semiconductor device and the memory circuit.
2. Description of the Related Art
In recent years, information equipment utilizing a semiconductor device has been spreading due to development of electronics and the coming of an advanced information society, and has been utilized in various fields such as military affairs, medical treatment, communication, education, and commercial transaction. Particularly, in information equipment, a semiconductor device which performs operation in accordance with a program is referred to as a computer. It is expected that information equipment mounted with the computer spreads more and more in the future.
The computer which is widely utilized at present has an arithmetic processing circuit and a memory circuit, and operates in accordance with a machine language program stored in the memory circuit. The computer changes its function by rewriting the machine language program stored in the memory circuit. Such an architecture concept of the computer is referred to as a program built-in system (also referred to as a stored program system). For example, Non-Patent Document 1 (Non-Patent Document 1: John L. Hennessy and David A. Patterson, “Computer Architecture: A Quantitative Approach”, Third Edition, Morgan Kaufmann Publishers, pp. 2-86, 2003) shows a configuration method of a stored program computer.
In a computer mounted with an arithmetic processing circuit and a memory circuit, computer performance is determined by operation speed of the memory circuit. For example, a machine language program executed by the arithmetic processing circuit is sequentially read from the memory circuit and executed. Further, when the machine language program is executed by the arithmetic processing circuit, the arithmetic processing circuit reads and writes processing data from/to the memory circuit. That is, the semiconductor device mounted with the arithmetic processing circuit and the memory circuit requires a high-speed memory circuit to achieve high-speed operation.
However, there is a problem that power consumption of the semiconductor device equipped with the memory circuit becomes high as the operation speed of the memory circuit becomes high. Further, in consideration of the maximum power consumption of a memory, it is necessary to provide measures against power source allotment, heat dissipation, and the like in designing a semiconductor device mounted with a memory circuit, leading to increase in design cost proportional to power consumption. Accordingly, a portable computer driven with a battery is particularly required to reduce power consumption of a semiconductor device.
There are various methods for reducing power consumption of a memory circuit. For example, a method is proposed, in which power consumption is reduced by dividing a memory into block units and arranging a memory block, where instruction routines are stored in sequence of high execution frequencies of the instruction routines, in sequence of low memory address of a memory circuit (for example, Patent Document 1: Japanese Published Patent Application No. 2003-157200). Further, a method is disclosed in which low power consumption is achieved by optimizing the position and the number of transfer gates inserted in a memory circuit (for example, Patent Document 2: Japanese Published Patent Application No. 2001-85641).